In conventional non-volatile memory systems such as flash memory systems, controllers program rows of a NAND array in a prescribed sequential order beginning with a row along an initial word line that is closest to an end of memory cell strings connected to a ground or another common potential. The controller then programs a row of memory cells along a next sequential word line moving away from the initial word line, and so on, through a memory block.
As the controller programs the word lines closest to an end of memory cell strings connected to a ground or another common potential, voltage disturbances accumulate on the unprogrammed word lines farthest from the initial word line. Generally, during a programming operation, as the controller deselects word lines, some voltage may still be applied to the deselected word lines. For erased word lines, the voltage may be high enough to cause disturbance to memory cells, even though the voltage may not be high enough to trigger actual programming of the memory cells. Word lines that the controller has already programmed experience much less voltage disturbance because the potential difference is lower due to some charge being present on the floating gate associated with the word line. Because the word lines furthest from an initially programmed word line often remain erased often during programming, the word lines furthest from the initially programmed word line often accumulate the most voltage disturbance. These accumulate of voltage disturbances result in memory cell degradation and affect the perform of the memory system during any activity. This accumulation of voltage can cause word lines to fail or increase a rate at which memory cells break down, thereby affecting an endurance of the memory system.